Hardware Design of a High Performance Multi-Channel High Speed Signal Acquisition and Processing System

摘要：

This paper describes the hardware design of a high speed acquisition system based on a single DSP of ADI Blackfin Family. In order to realize multi-functions in a single board, CPLD and FPGA chips are integrated in this system. This study discusses several main problems during hardware design of this system, such as sampling of multi-channel analog signals, multi-channel digital signals and communication with host board by extended PCI bus, in addition talking about several points concerned with signal integrity issues. The main aim of this research is to demonstrate that as development of DSP and semiconductor techniques, a more complex electric system can be realized on a single DSP.

关键词： DSP Signal acquisition PC104-Plus

作者: Wu Qiang Bai Yangong

作者单位: DSP and Embedded System Lab,Beijing University of Technology,Beijing 100022 China

会议类型: 国际会议

会议名称: 第八届国际电子测量与仪器学术会议(Proceedings of 2007 8th International Conference on Electronic Measurement & Instruments)

会议地点: 西安

会议语种:英文

在线出版日期: 2007-08-16（万方平台首次上网日期，不代表论文的发表时间）