Design of Logic Control for Micro-power A/D with a Serial Interface Using FPGA

摘要：

To realize the low-power consumption and miniaturization of the remote power quality monitor, a kind of parallel multi-channel acquisition scheme using micro-power A/D with a serial interface is presented. After the designing ideas of total acquisition scheme based embedded microprocessor is introduced in the paper, the implementation of complex logic control for the micro-power A/D using FPGA is given in detail, and the correctness of sequential design to control the A/D is verified by simulation experiments with EDA tool. The scheme also has great practical values for the design of portable test instrument.

关键词： Low power consumption serial interface A/D conversion FPGA embedded microprocessor power quality monitor

作者: Wen Xv Hu Bing Wang Wenbin

作者单位: School of Electrical and Information Engineering,Xihua University,Chengdu 610039 China

会议类型: 国际会议

会议名称: 第八届国际电子测量与仪器学术会议(Proceedings of 2007 8th International Conference on Electronic Measurement & Instruments)

会议地点: 西安

会议语种:英文

在线出版日期: 2007-08-16（万方平台首次上网日期，不代表论文的发表时间）