An Optimized Design of MCU in CPU Soft-core Based on the FPGA

摘要：

Through the discussion of the structure and the design process about micro-programmed control unit (MCU) in CPU soft-core. An optimized design method of next-address shift logic in MCU is presented in this paper by designing instruction operating code and arranging microinstructions storage. Some of codes using Verilog_HDL are given. Simulation result indicate that this method is practical and has reference value in designing CPU soft-core based on the FPGA

关键词： MCU address shift logic Verilog_HDL FPGA

作者: Xing Yuhua Wang Ru

作者单位: Xians Univ.of Tech.Xian 710048,China Xians Univ.of Arch.& Tech.Xian 710055,China

会议类型: 国际会议

会议名称: 第八届国际电子测量与仪器学术会议(Proceedings of 2007 8th International Conference on Electronic Measurement & Instruments)

会议地点: 西安

会议语种:英文

在线出版日期: 2007-08-16（万方平台首次上网日期，不代表论文的发表时间）