Electromigration Time to Failure Simulation for Solder Bumps of a Chip Scale Package

摘要：

This paper studies the numerical simulation method for electromigration in the solder joint of a chip scale package.The three dimensional electromigration finite element model for solder joint reliability is developed. Numerical experiments are carried out to obtain the electrical, thermal and stress fields with the migration failure under high current density loads. The indirect coupled analysis that includes electrical, thermal and stress fields are investigated and discussed. The viscoplastic Anand constitutive material model with both SnPb and SnAgCu solder materials is considered in the paper. The sub-model technique is studied with indirect coupled multiple fields. The impacts of geometry parameters,which include ball shape, trace width and UBM diameter for void formation and electromigration time to failure (TTF) are finally investigated.

作者: Shinan Wang Lihua Liang Yuanxiang Zhang Yong Liu Scott Irving Timwah Luk

作者单位: Fairchild-ZJUT Microelectronic Packaging Joint Lab, Zhejiang University of Technology, Hangzhou, Chi Fairchild Semiconductor Corp., Portland, Maine, USA

会议类型: 国际会议

会议名称: 第八届电子封装技术国际会议(2007 8th International Conference on Electronics Packaging Technology ICEPT2007)

会议地点: 上海

会议语种:英文

页码: 661-670

在线出版日期: 2007-08-14（万方平台首次上网日期，不代表论文的发表时间）