Study on Theory and Key Technologies of Full Digital SPWM Implementation for Three- Level Neutral Point Clamped Inverter

摘要：

In this paper, the digital realization theory and key technologies of Multi-level SPWM scheme implementation for the three-level Neutral Point Clamped (NPC) inverter is presented. The digital asymmetrical regular sampling principle of SPWM is realized with only a single FPGA chip LFEC10 from LATTICE Inc. and the programming language is Very High Speed Integrated Circuit Hardware Description Language (VHDL). This full digital circuit can provide an effective, flexible, and safe solution for high-power inverts. At last, some simulation and experimental results have been presented and discussed in this paper.

作者: Liu Jian, Yin Xianggen, Zhang Zhe Xiong Qing

作者单位: Electric Power Security and High Efficiency Lab Huazhong University of Science and Technology, Wuhan, P.R.China

会议类型: 国际会议

会议名称: 2007年通信、电路与系统国际会议(2007 International Conference on Communications,Circuits and Systems Proceedings)

会议地点: 日本福冈

会议语种:英文

在线出版日期: 2007-07-11（万方平台首次上网日期，不代表论文的发表时间）