Using a Data-Flow Scheme to Minimize the Power Consumption of an Embedded Processor

摘要：

Data-flow processors was a very hot research field and considered as a likely direction to the next generation of computer from 1970s to middle 1980s. Data-flow machines optimize their hardware for fine grain data driven parallel computation to increase the throughput. Although most attempts on data-flow machines seem unsuccessful today, we believe that data-flow architectures have power-efficiency advantage over conventional von Neumann architectures.

关键词： Data-Flow Machine Low-Power Design Asynchronous Design Computer Architecture Reconfigure Computing

作者: CHEN Pinghua LIU Yijun XIE Guobo LI Zhenkun

作者单位: Sensor Network Group, Faculty of Computer Guangdong University of Technology Guangzhou, 510006, China

会议类型: 国际会议

会议名称: 第一届国际计算机新科技与教育学术会议(Proceedings of the First International Conference on Computer Science & Education ICCSE2006)

会议地点: 厦门

会议语种:英文

页码: 190-194

在线出版日期: 2006-07-27（万方平台首次上网日期，不代表论文的发表时间）