Junction Specifications for the 45nm Node

摘要：

As processes are being defined and transistor architectures are being selected for the 45nm node, the International Technology Roadmap for Semiconductors (ITRS) 1 provides a worthwhile reference for comparing options. In this paper, we discuss those parameters of the ITRS which are related to transistor junctions, from the viewpoint of one selecting a transistor design. Any selection involves tradeoffs, so by addressing how much leeway is expected for the different targets, those selections can be simplified. Along the way, we highlight some interesting contrasts, and present some unique approaches for reaching the targets.

作者: W.J.Taylor E.Verret

作者单位: Freescale Semiconductor, Austin Silicon Technology Solutions

会议类型: 国际会议

会议名称: The Sixth International Workshop on Junction Technology(第六届国际结技术研讨会)

会议地点: 上海

会议语种:英文

在线出版日期: 2006-05-15（万方平台首次上网日期，不代表论文的发表时间）