The Implementation of Turbo Decoder on DSP in WCDMA System
This paper describes the design and implementation of Turbo decoder which has been selected for 3G mobile systems on TMS320C6201 DSP developed by Texas Instruments(TI) in 1998. With the incomparable operating speed, which is 200 MHz(5-ns cycle time), TMS320C6201 DSP can achieve the performance of up to 1600 million instructions per second(MIPS) and consequently has gained more and more popularity in many applications. In this paper a Turbo decoder is implemented on the TMS320C6201 Evaluation Module(EVM) board with the code rate 1/3. To every step of the algorithm, we discussed the optimized C code and the minimum cycle time of CPU (best situation of the theory), and get pleasant decoding speed.
3G DSP TMS320C6201
Yuansheng Song Gongyuan Liu Huiyang
Schoo1 of Water Resources and Hydropower, Wuhan University, China, 430072 School of Electrical Engineering, Wuhan University, China, 430072 Sino Computer and Information Center, Wuhan University, China, 430072
国际会议
武汉
英文
1281-1283
2005-09-23（万方平台首次上网日期，不代表论文的发表时间）