Formal Co-Verification for SoC Design With Colored Petri Net

摘要：

The complexity of SoC is increasing rapidly. It is an important trend that SoC design is always based on the reuse of both IP cores and components.This paper formulates the IP cores, components and user defined logics using colored Petri net and presents a method to translate the architecture design into the colored Petri net model. In this paper a formal co-verification approach of SoC using CPN tools is also proposed. The method concentrates on the design correctness. An example of the audio and video architecture design of the PDA platform illustrates the effectiveness of our approach on practical applications.Finally, the experimental results are given.

作者: Zhan Jinyu Sang Nan Xiong Guangze

作者单位: College of Computer Science and Engineering,University of Electronic Science and Technology of China, 610054 Chengdu, China

会议类型: 国际会议

会议名称: 首届嵌入式软件与系统国际会议(Proceedings of the First International Conference on Embedded Software and System)

会议地点: 杭州

会议语种:英文

页码: 110-116

在线出版日期: 2004-12-09（万方平台首次上网日期，不代表论文的发表时间）