A Functionality based Instruction-Level Software Power Estimation Model for Embedded RISC Processors
This paper describes a functionality-based instruction-level power analysis model, which aims at reducing workload of computing inter-instruction power and keeping the convenience to observe necessary parameters from a source-code description. The model treats the total power as the sum of basic power of individual functional component and switching power of consecutive components pairs. To get the switching power, the switching activities between two functional components are treated as one changing from working state to sleeping state and the other from sleeping state to working state. NOP instructions are used to model transitions between the two states. The model is experimentally validated on a wide range of embedded software routines. Experiments show that our model is within 95％ accuracy on the average, and can reduce the workload firom a complexity of O(n2), which is the workload of traditional instruction-level energy estimation techniques, to a complexity of O(n).
Software power estimation functional component instruction level
Jia Chen Sheng-yuan Wang Yuan Dong Yang Yang
Department of Computer Science and Technology, Tsinghua University Beijing 100084, China
国际会议
首届嵌入式软件与系统国际会议(Proceedings of the First International Conference on Embedded Software and System)
杭州
英文
398-403
2004-12-09（万方平台首次上网日期，不代表论文的发表时间）