Defined-grain Polycrystalline Thin Film Transistors
We propose a new technology to define and control the grain boundaries and domains of low temperature polycrystalline silicon (LTPS) films. It can be realized by combination of the solution process and the provision of nucleation sites (NS) and supplemental sites (SS). As a result, the crystallized poly-Si film has a much lower nickel concentration as compared to traditional metal induced lateral crystallization (MILC) poly-Si. High-performance TFTs are obtained regardless of the position of the grain boundaries. Different shapes of domains can be obtained corresponding to different distributions of the NS and SS. Among the optimal designs a honeycomb structure and a zonal structure are the most typical and practical. With the repeatedly regular distribution of the NS and the SS, domains of the same shape and size can be realized. This process is precisely controllable and the crystallization time can be reduced to about 2 hours at 590℃. The fabricated P-Channel TFTs show good performance.
Metal Induced Crystallization Controlled Grain Polycrystalline Thin Film Transistor
Shuyun Zhao Zhiguo Meng Bo Zhang Man Wong Hoi-Sing Kwok
Department of Electronic and Computer Engineering,Hong Kong University of Science and Technology,Clear Water Bay, Hong Kong, China
国际会议
上海
英文
523-527
2007-03-12（万方平台首次上网日期，不代表论文的发表时间）