On-panel Electrostatic Discharge (ESD) Protection Design with Thin-film Transistor in LTPS Process

摘要：

The electrostatic discharge (ESD) robustness of diode-connected n-type thiD-film transistors (N-TFTs) and diode-connected p-type thin-film transistors (P-TFTs) with different layout structures in a given low-temperature polycrystalline silicon (LTPS) process is investigated. By using the wafer-level transmission line pulsing (TLP) system, the high-current transient characteristics and the secondary breakdown current (It2) levels of the diode-connected TFTs under different device parameters and layout structures are directly measured on the glass substrate. Finally, one set of design rules for onpanel ESD protection design is suggested.

关键词： Thin-film Transistors (TFTs) Low-temperature Polycrystalline Silicon (LTPS) Electrostatic Discharge (ESD) Transmission Line Pulsing (TLP) System

作者: Ming-Dou Ker Jie-Yao Chuang Chih-Kang Deng Chung-Hong Kuo Chun-Huai Li Ming-Sheng Lai Chin-Wei Wang Chun-Ting Liu

作者单位: Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung Univ AU Optronics Corporation, Science-Based Industrial Park, Taiwan, China

会议类型: 国际会议

会议名称: 2007亚洲显示国际会议（AD07）

会议地点: 上海

会议语种:英文

页码: 551-556

在线出版日期: 2007-03-12（万方平台首次上网日期，不代表论文的发表时间）