Hysteresis Phenomenon of PMOS-SPC ( Solid Phase Crystallization) -Si TFT on Glass Substrate with Various Operating Temperatures
We investigated the temperature dependence on the hysteresis of SPC-Si TFT on a glass substrate. The PMOS SPC (solid phase crystallization) -Si TFT was fabricated on a glass substrate employing alternating magnetic field crystallization (AMFC) method without metal catalyst. The threshold voltage of SPC-Si TFT at forward sweep direction was -5.52 V while threshold voltage at reverse sweep direction was -5. 15 V at 25℃ respectively. When it measured at 60℃, the threshold voltage of forward sweep was -5.01 V while that of reverse sweep was -4.72 V. Variation of threshold voltage caused by hysteresis is reduced from 0. 37 V to 0.28 V at an elevated temperature (60℃) . The s-slope of PMOS SPC-Si TFT of forward sweep was increased while that of reverse sweep was not altered almost at an elevated temperature (60℃) , because the quantity of initial trapped electron charges in a SiO2 gate insulator was increased more than that of hole charges. The drain current of SPC-Si TFT was altered even at the same VC5 voltage and VDS voltage, according to previous gate voltage due to hysteresis of SPC-Si TFT. Hysteresis of SPC-Si TFT needs to be improved for pixel element of high quality AMOLED display.
SPC-Si TFT Hysteresis AMOLED
Sang-Geun Park Jae-Hoon Lee Won-Kyu Lee Woo-Cheul Lee Min-Koo Han
School of Electrical Engineering and Computer Science ＃50, Seoul National University San 56-1, Shillim-Dong, Kwanak-Gu 151 -742, Seoul, Korea
国际会议
上海
英文
1439-1443
2007-03-12（万方平台首次上网日期，不代表论文的发表时间）