FPGA-Based Experimentation for TMR Structure and Evolutionary Approach of Self-Recovering
According to the basic principle of TMR (Three module redundancy) and EHW (Evolvable Hardware) technique, the paper discussed in the detail about a fault-tolerance and self- recovery system with FPGA chips and VHDL language. Then, an experiment environment was designed and created, which could be used for further study of some tangible evolution work and function testing systems. Based on this, an improved TMR structure was finished as an example. So, if there comes an abnormal result in the output of any 1 of the 3 modules, it will be corrected immediately, and if there are constant malfunctions in a module, it could be bypassed, and a self-recovery process for the corresponding circuit could then be launched. Then, a new circuit that can be used for the replacement will be designed by evolutionary algorithms, and downloaded to the under-testing controller automatically to replace the damaged circuit. The experiment shows that this TMR-EHW approach increased the reliability of the system when it is exposed to EMI.
TMR EHW FPGA fault tolerance
YUAN Liang HUANG Feiyun LIU Wenbing LIU Wenjie
Department of Computer, Mechanical Engineering College, China
国际会议
The First International Conference on Maintenance Engineering(首届维修工程国际学术会议)
成都
英文
172-179
2006-10-15（万方平台首次上网日期，不代表论文的发表时间）