Instruction-Level Optimization of H.264 Encoder Using SIMD Instructions
The latest video coding standard H.264/AVC is promising for its high coding performance with the cost of significantly higher complexity. In this paper, instruction-level optimization of H.264 encoder is proposed by exploiting singleinstruction-multiple-data (SIMD) instructions. The key modules in H.264 encoder, such as SAD calculation, integer transform and inverse integer transform, SATD calculation and 1/4 pixel interpolation, are speed up. The simulation results on several video sequences show that our proposed instruction-level optimization achieves a speed-up factor of 1.3 up to 12 for every key module. The overall encoder spedup gain is about twice without introducing serious quality degradation. The proposed instruction-level optimization is joined with algorithm optimization for X.264 encoder, and real-time encoding is achieved for video sequences in 4CIF format.
Yu Shengfa Chen Zhenping Zhuang Zhaowen
School of Electronic Science and Engineering National University of Defense Technology Changsha, Hunan, 410073, China
国际会议
2006 International Conference on Communications,Circuits and Systems(第四届国际通信、电路与系统学术会议)
广西桂林
英文
126-129
2006-06-25（万方平台首次上网日期，不代表论文的发表时间）