Enhanced Low-Density Parity-Check Codes Based on Sum-check Blocks

摘要：

Based on some characteristics of decoding and error-floors of low-density parity-check (LDPC) codes, an approach of adding sum-check blocks to original LDPC blocks over GF(2) is proposed. The performance of this approach is analyzed and the circuits are also presented. Also, the simulation results show that the performance of the constructed LDPC codes can be improved significantly with low cost, as the block error probability (BEP) drops.

作者: Jingli Lin Longjiang Jing Weile Zhu Chen Yang

作者单位: School of Electronic Engineering University of Electronic Science and Technology of China Chengdu, S School of Mechanical Engineering and Automation Xihua University Chengdu, Sichuan, China

会议类型: 国际会议

会议名称: 2006 International Conference on Communications,Circuits and Systems(第四届国际通信、电路与系统学术会议)

会议地点: 广西桂林

会议语种:英文

页码: 735-738

在线出版日期: 2006-06-25（万方平台首次上网日期，不代表论文的发表时间）