Partition-based Retiming and Precomputation for Dynamic Power Reduction

摘要：

This paper presents a partition-based retiming approach to reduce dynamic power in CMOS circuits. More precisely, the algorithm first partitions the original circuit into some subcircuits, effectively reducing the computation complexity. It then applies retiming technique among these subcircuits, while precomputing some subcircuits with enough size and single output. We experiment the low-power technique with ten MCNC benchmarks, and the average reduction of power can be 43％, 4％ higher than previous methods.

作者: Sheng Zhou Jinian Bian

作者单位: Department of Computer Science and Technology Tsinghua University Beijing, P. R. China

会议类型: 国际会议

会议名称: 2006 International Conference on Communications,Circuits and Systems(第四届国际通信、电路与系统学术会议)

会议地点: 广西桂林

会议语种:英文

页码: 2295-2298

在线出版日期: 2006-06-25（万方平台首次上网日期，不代表论文的发表时间）