Expendable Modular Chips for Feedforward Neural Nets

摘要：

Simple nonlinear synapse circuit proposes fo r implementation of artificial neural networks using standard CMOS technology. The operatic n of the proposed synapse circuit has been ver ified using HSPICE circuit simulator. A 9x3 m odule chip has been designed and fabricating using MOSIS AMI 1.5 μm double-metal doublepoly CMOS process. The modular neural chip might be very suitable for the future implement ation of the large-scale neural networks with o n-chip learning.

作者: Hwa-Hyun Cho Hee-Chcol Kim Myung-Ryul Choi

作者单位: ASIC Lab. Dept, of EECI, Hanyang Univ.17 Hangdang-dong, Seongdong-Ku, Seoul, 133-791, Korea

会议类型: 国际会议

会议名称: 8th International Conference on Neural Information Processing(ICONIP 2001)(第八届国际神经信息处理大会)

会议地点: 上海

会议语种:英文

页码: 1249-1251

在线出版日期: 2001-11-14（万方平台首次上网日期，不代表论文的发表时间）