Test Generation with Unspecified Variable Assignments
ATPG for very large scale integrated circuit designs is an important problem in industry. With the advent of SOC designs, testing and verification of the core-based designs become a challenging problem. This paper presents an algebraic test generation algorithm with unspecified variable assignments. Given a stuck at fault of the circuit with unspecified signals, the proposed algorithm uses a new encoding scheme for unspecified variable assignments, and solves the Boolean satisfiability formula representing the Boolean difference to obtain a test pattern. Experimental results demonstrate the efficiency and feasibility of the proposed algorithm.
test generation formal verification boolean satisfiability unspecified assignments
LI Guanghui FENG Dongqin
School of Information Engineering,Zhejiang Forestry College,Hangzhou 311300,China;Supcon Technology Supcon Technology CO.,LTD,Hangzhou 311300,China;National Laboratory of Industrial Control Technology
国内会议
北京
英文
180-185
2007-07-15(万方平台首次上网日期,不代表论文的发表时间)