Technological Requirements for a Self-Aligned Lateral SiGe HBT with the SiGe Layer Formed by Ge Ion Implantation in Si Including Theoretical Performance
Si-On-ONO (SOONO) Devices Realized on Bulk Si Wafers for Fully-Depleted SOI Transistor and 4-Bit Flash Memory Applications
Bias Temperature Instability in MOSFETs with Atomic-Layer-Deposited Si-Nitride/SiO2 Stack Gate Dielectrics