Power Noise Analysis Acceleration Technique by Linear Programming

摘要：

In the early floor plan,power noise DC analysis by linear programming method has been proposed 1. In order to accelerate the analysis speed, we propose new objective functions and also new constraints for linear programming. Using our new ideas can accelerate analysis speed by about 10s times comparing with conventional method in the case of 20 horizontal x 20 vertical power nets noise analysis for 19 application program execution cycles.

关键词： Power noise analysis Linear programming Early floor plan

作者: Goro Suzuki Takeshi Gomakubo

作者单位: University of Kitakyushu,Fukuoka,JAPAN

会议类型: 国际会议

会议名称: 2009 IEEE 8th International Conference on ASIC(第八届IEEE国际专用集成电路大会)

会议地点: 长沙

会议语种:英文

页码: 1232-1235

在线出版日期: 2009-10-20（万方平台首次上网日期，不代表论文的发表时间）