A High Data-Rate Software Defined Radio Receiver Suited for FPGA Platforms
Although Alternate Parallel Receiver (APRX) could effectively improve the maximum demodulating rate of the receiver, its frequency domain processing module consumes a large amount of multiplication units when the number of parallel input channels is large, making it unsuitable for use on FPGA software defined radio platforms. This paper proposes an optimization scheme by introducing partitioned convolution and exploring the spectrum characteristic of the APRX input data, reducing the usage of multipliers greatly with no throughput loss. After the optimization, the number of real multipliers used in the frequency-domain processing module of the 16-ary APRX is reduced from about 576 to 68, with little performance loss. This optimized APRX is fairly suitable for FPGA software defined radio platform applications.
FPGA APRX optimization partitioned convolution.
Zhijun Chen Yafeng Zhan Jianhua Lu
Department of Electronic Engineering, Tsinghua University, Beijing, China
国际会议
第一届软件无线电技术研讨会(ist International Software Ridio Technology Workshop)
北京
英文
1-4
2008-10-16（万方平台首次上网日期，不代表论文的发表时间）