Design of PLL For TD-SCDMA Systems

摘要：

Error Vector Magnitude (EVM) is a key parameterfor modern wireless communication such as TD-SCDMA andWCDMA. In TD-SCDMA system, there are many factorsaffecting the result of EVM and the phase noise of localoscillator (LO) is the most important one, so how to implementa phase-lock loop (PLL) design based on the EVM specificationis challenging for radio designers. In this paper, we analyzedthe relationship between EVM (Error Vector Magnitude) andphase noise of PLL based on the structure of the TD-SCDMAsystem firstly. Secondly, A PLL simulation program whichcombined with the EVM simulation is written with ADS(Advanced Design System). Finally, as a practical application,the paper introduced a PLL circuit design for the TD-SCDMAsystem.

作者: Liu Mei-rui He Song-bai

作者单位: School of Electronic Engineering University of Electronic Science and Technology of China Chengdu, Sichuan, China

会议类型: 国际会议

会议名称: 2007年通信、电路与系统国际会议(2007 International Conference on Communications,Circuits and Systems Proceedings)

会议地点: 日本福冈

会议语种:英文

在线出版日期: 2007-07-11（万方平台首次上网日期，不代表论文的发表时间）