Multi-Stage Power Gating Based on Controlling Values of Logic Gates

摘要：

As the CMOS technology scales down, low power technologies have been expected to reduce leakage power of the CMOS device. Controlling value based power gating is a fine-grained active mode power gating approach using the controlling values of logic elements. In this method, one input of a logic gate taking the controlling value stops the power supply to the logic blocks generating other inputs. In this paper, we propose a multi-stage power gating method based on controlling values by stopping the power supply of several gates in the power controlled blocks. Experimental results show that the proposed approach increases the number of power-off elements by 26.7％ in average compared with the single-stage power-gating method.

作者: Yu JIN Shinji KIMURA

作者单位: Grad. School of IPS, Waseda University 2-7 Hibikino, Wakamatsu, Kitakyushu, 808-0135 Japan

会议类型: 国际会议

会议名称: 2011 IEEE 9th International Conference on ASIC(2011年第九届IEEE国际专用集成电路大会)

会议地点: 厦门

会议语种:英文

页码: 87-90

在线出版日期: 2011-10-25（万方平台首次上网日期，不代表论文的发表时间）